A few weeks ago, Intel launched their 2nd generation of Intel Xeon SP (formerly known as “Cascade Lake”.) There are some very important reasons you need to purchase your next blade servers with this CPU.
1) Hardware Security Mitigation – with the 1st generation of Intel Xeon SP processor, you have to implement software patches to fix the security flaws uncovered last year. With the 2nd generation of Intel Xeon SP, these patches have been applied at the microcode level removing the need for additional patches. In fact, some people are seeing up to 60% performance improvement on the 2nd gen Intel Xeon SP processors vs the 1st generation that are using patches. Bottom line – if you want better performing apps, move to the 2nd gen Intel Xeon SP.
2) Faster Memory – this generation of CPU will offer memory that runs at 2933 MT/s … with a caveat, of course. The higher speed offering is only available on the Platinum and Gold CPUs AND it’s only available when you populate 1 DIMM per channel (1 DPC), or the first 6 DIMMs per CPU. When you move to the 2nd DIMM per channel, or the 2nd 6 DIMMs per CPU, the memory speed drops to 2666 MT/s (which is the peak speed of the 1st generation of the Intel Xeon SP.) While this won’t impact your virtualization workloads, it’s important to know for those workloads that are memory sensitive.
3) Greater Frequency / More Cores (maybe) – the 2nd Generation of Intel Xeon SP will provide a slight improvement in CPU frequency and in some CPUs a few additional cores. The majority, though, only have a frequency increase – the cores and thermals (TDP) remain the same as the 1st generation. I’d encourage you to go to Intel’s ARK page at https://ark.intel.com/content/www/us/en/ark/products/series/192283/2nd-generation-intel-xeon-scalable-processors.html to see specific details.
4) Support for Higher Base Memory and New CPUs for Higher Memory – previously Intel had a limitation of 768GB per CPU before requiring a CPU with a “M” suffix. With the 2nd gen Intel Xeon SP, that base limit has been raised to 1TB per CPU (or 2TB per dual CPU system.) The “M” suffix supports 2TB/CPU (or 4TB / dual socket CPU) and the “L” suffix supports 4.5TB / CPU. If you are wondering how you get to that much memory – the answer is with Intel’s Optane DC Persistent Memory that scales up to 512GB per DIMM – a topic for another blog post. Bottom line is be aware of what your server needs will be over the life of the server because these memory limitations are hard-coded by Intel and can’t be changed by a firmware update; only a “M” or “L” suffix will support large memory foot prints.
5) Embedded Instructions to Boost Deep Learning Inference Acceleration – if your organization is invested in deep learning, then inferencing is a key component of that process. The 2nd generation Intel Xeon SP processor has embedded “Vector Neural Network Instructions, or VNNI”. To put this into simple terms, think about the early 2000’s when Intel created the Intel Pentium MMX (multi-media instructions.) The purpose was to allow you to build a “box” in one command versus 4 commands, i.e. draw right, draw down, draw left, draw up. The same principle applies with these instruction sets designed to help with inferencing .
I encourage you to seriously consider moving to the Intel 2nd generation Xeon SP CPU. As a final note – a quick way to determine what generation Intel Xeon SP you are looking at, check out the 2nd digit in the description. If it’s a 1, it’s the first generation. If it’s a 2, it’s the 2nd generation and has the benefits I’ve described above.
Kevin Houston is the founder and Editor-in-Chief of BladesMadeSimple.com. He has over 20 years of experience in the x86 server marketplace. Since 1997 Kevin has worked at several resellers in the Atlanta area, and has a vast array of competitive x86 server knowledge and certifications as well as an in-depth understanding of VMware and Citrix virtualization. Kevin has worked at Dell EMC since August 2011 as a Server Sales Engineer covering the Global Enterprise market from 2011 to 2017 and now works as a Chief Technical Server Architect supporting the Central Enterprise Region at Dell EMC.
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